Explain the working of 6-T SRAM cell
SRAM cell working at 6T The two inverters of a typical 6T SRAM cell are linked together back to back. The input of the second inverter is coupled with the output of the first inverter and the other way around. SRAM primarily executes three operations, namely Hold, Read, and Write operations. The bit line and bit line bar (BL & BLB) are also in an OFF condition when the word line’s two access pass transistors are in an OFF state, putting the memory cell in a hold state. A write operation can be carried out if the bit and bit bar lines both functions as inputs. The read operation can be carried out if both the bit and bit bar lines function as outputs.
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